Netline is looking for a PHY System engineer for our CTO team.
Job description:
- Leading PHY activities from feature development to integration
- Focal point for PHY and RF related aspects
- Define and write system-level requirements for FPGA/DSP teams
- Work in collaboration with all company teams such as SW, DSP, Algorithms, QA, and others
Job Requirements:
- MUST: Over 3 years of experience in PHY communication / signal processing
- MUST: Good expertise in coding in MATLAB signal processing
- VHDL/Verilog coding – advantage
- understanding of Wireless communication systems
- Experience with SDR (Software Defined Radio) – advantage